Training molecules to draw chips

Researchers at the University of Wisconsin have come up with a way to organize molecules through lithography, the science of "drawing" chip circuits. It's a development that could one day help bridge the nanotechnology-silicon divide.

The work performed by scientists at the University of Wisconsin's Materials Research
Science and Engineering Center (MRSEC) can be conceived of as "top-down meets bottom-up." It highlights how nanotechnology--which involves manipulating molecules to make products--could be used by the electronics industry in the future.

Currently, creating circuits on silicon chips involves several hundred different procedures, including coating the wafers with metallic vapors, printing circuit patterns that have been shrunk to microscopic dimensions onto wafer surfaces, and burning the patterns into wafers through a series of chemical baths. Outfitting a semiconductor fabrication facility with equipment to perform these tasks can cost $3 billion.

By contrast, nanotechnology advocates say that making circuits out of self-organizing molecules can drastically reduce chipmaking costs. Unfortunately, self-organizing molecules have not so far organized themselves into straight lines. Instead, they generally form swirls or other aesthetically pleasing shapes.

"The problem is that you can't meet many of the requirements for manufacturing," said Paul Nealy, who oversaw the project.

The MRSEC team managed to draw two different types of alternating lines into silicon wafers through extreme ultraviolet (EUV) lithography. These etched wafers were then washed in a solution containing two different types of polymers. One of the polymers had a chemical reaction to one type of line and the other contained a chemical that reacted to the second type of line.

In the end, the polymers formed lines with no evidence of swirling or other undirected behavior. The lines drawn were 24 nanometers long, which is far smaller than transistors manufactured today.
Right now, the lines are simply that: a series of vertical polymer stripes on the surface of a silicon wafer. In the future, however, this technique could be used to grow longer lines that could be used to retain data inside of magnetic storage devices.

Ultimately, tiny circuits created in this manner could lead to chips that are smaller and more powerful than today's.


"In terms of storage alone, that could mean a computer with 4,000 gigabytes of memory," said MRSEC center director Juan de Pablo, a member of the Wisconsin team, in a statement.

Creating such chips, however, will likely take a number of years, Nealy said. EUV lithography is still in the experimental stage. Scientists are also only now developing nanotechnology materials.

Determining the properties of these materials, and figuring out how to incorporate them into products, will constitute major research projects in the next decade, many experts believe.

"Every physical property you can think about is different on the nanoscale," said Vanita Mani, a scientist working on nanotechnology projects at General Electric, in an interview earlier this month.

Wisconsin's MRSEC is one of 27 materials research centers established by the National
Science Foundation. The group also works closely with the Semiconductor Research Corporation, a consortium that includes IBM and Intel.