Sr. Digital Design Engineer (San Jose, CA)

Purpose:
Philips Semiconductors

One of the world’s top ten semiconductor manufacturers, Philips Semiconductors provides enabling technologies for our Healthcare, Lifestyle and Technology vision, focused on providing semiconductor-based solutions for the Connected Consumer. These enable consumers to have intuitive access to information, entertainment and services – anytime, anywhere and on any device.

With over 33,000 employees, the Global organization serves the consumer, communications, automotive and computing markets. We focus on system solutions that accelerate and simplify our customers’ development and allow them to deliver what consumers want – functionality that’s as easy as pressing a button.

At the heart of this is our portfolio of Nexperia system solutions for digital multimedia applications; and intuitive technologies like Near Field Communications, which allows people to interact with their environment without complicated menus or complex set-up procedures.

Business Unit Chief Technology Office

Sr. Digital Design Engineer (San Jose, CA)

Job Description

Work on the award-winning cutting-edge TriMedia™, with some of the most talented media processors developers. Interact closely with the technology experts in creating best-in-class solutions for video processing optimized for high performance, low power consumption and low cost in challenging, deepsub-micron technologies (65nm, 45nm and beyond).You will be responsible for technical leadership of the logic design and development of TriMedia™ processors and high-performance on-chip bus infrastructures. You will do the logic design of the next generation of the TriMedia™ products, driving high-speed, low-power digital design, Verification, DfT. Interace with Physical Design team to implement optimal solutions.

Philips is an Equal Opportunity Employer

Job ID 35666
REQUIREMENTS
Required Qualifications:
Experience Requirements:
Preferred Profile

MUST HAVE 5+ YEARS IN DIGITAL DESIGN.AND TECHNICAL LEADERSHIP SKILLS. Expertise in High-speed, low-power design methodologies; front-end design flows (RTL, synthesis, timing analysis) and backend-flows (DfT, timing closure, floor-planning). Technical Leadership capabilities, Strong Analytical and Communication skills MUST HAVE Strong knowledge of HIGH- SPEED/ HIGH- PERFORMANCE PROCESSOR ARCHITECTURES and on-chip communication infrastructures (e.g. cache architectures, execution pipeline, bus interfaces, floating point units)Experienced in Performance Analysis in high-bandwidth systemsUnderstanding of Compilers and compiler optimization techniques.