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 ASIC Design Engineer - RTL Synthesis, VLSI Design, Front-End

Details
Country: USA
Location: Irvine CA
Total applied: 40
Location: US-CA-Irvine
Experience:
At Least 3 Years
Employee Type: Full-Time Employee
Education:
4 Year Degree
Required Travel:
Not Specified
Contact
Name:
Roy Monroy
Email:
Not Available
Phone:
949.885.5143
Ref ID:
RM-ASICDesig-CA9
Required Skills ASIC Design Engineer - RTL Synthesis, VLSI Design, Front-End - Required Skills: ASIC Design Engineer, RTL Synthesis, VLSI Design, Verilog, Synopsys or Cadence, Design large block (50k - 100k)

If you are a good fit for the ASIC Design Engineer - RTL Synthesis, VLSI Design, Front-End position, and have a background that includes:

ASIC Design Engineer, RTL Synthesis, VLSI Design, Verilog, Synopsys or Cadence, Design large block (50k - 100k) and you are interested in working with the following job types:
Information Technology, Engineering, Professional Services -- within the following industries:
Computer Hardware, Computer Software, Wireless, we would love to review your resume for the ASIC Design Engineer - RTL Synthesis, VLSI Design, Front-End job!


Are you a fit for the ASIC Design Engineer - RTL Synthesis, VLSI Design, Front-End opening?

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ASIC Design Engineer - RTL Synthesis, VLSI Design, Front-End - Required Skills: ASIC Design Engineer, RTL Synthesis, VLSI Design, Verilog, Synopsys or Cadence, Design large block (50k - 100k)

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ASIC Design Engineer - RTL Synthesis, VLSI Design, Front-End

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